From Design to Tapeout: Verification for Fabrication-Ready PICs using Luceda IPKISS

Verification is a vital step in the development of photonic integrated circuits (PICs), helping ensure your designs are both manufacturable and behave as intended. Design Rule Checking (DRC), Layout Versus Schematic (LVS), circuit simulation and corner analysis are all key aspects of verification. DRC and LVS have their roots in electronic design automation (EDA) but require tailored adaptation for the complex world of photonics.

Join us for a joint webinar where Tower Semiconductor, Spark Photonics, and Luceda Photonics will discuss the importance of verification in PIC design, and how PIC designers can efficiently verify their designs prior to taping out at a foundry.

In this webinar:

• Tower will introduce their industry-leading PIC platform and discuss why DRC is essential for successful fabrication.
• Spark will provide an overview of the PIC design workflow, including DRC and LVS, and introduce Check Mate DRC, a powerful tool for detecting design rule violations.
• Luceda will demonstrate:
• • A full PIC design and layout flow on the Tower PH18M process using the Luceda Photonics Design Platform.
  • Verification of the design in Luceda IPKISS.
  • Identifying and fixing errors to prepare for successful tape-out at Tower.

Whether you're new to PIC design or looking to refine your verification process, this webinar offers practical insights and tools to enhance your PIC design flow and help you create manufacturable PICs, avoiding unnecessary costs and delays to market.

Register now to learn more about Tower’s PIC platform, how to ensure foundry design rule compliance with Spark’s Check Mate DRC, and how to confidently verify your PIC designs using the Luceda Photonics Design Platform!