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Closing the Gap Between PIC Designers and Foundries: DRC in PIC Design

Webinar

演讲嘉宾

As the photonic integrated circuit (PIC) industry advances toward large-scale integration, robust Design Rule Checking (DRC) has become essential for a successful tape-out. Yet for many PIC designers, this final step in the design flow is often the most time-consuming and frustrating. Unexpected last-minute issues, repeated back-and-forth communication with foundries, and multiple revision cycles can delay projects, increase costs, and create unnecessary stress, ultimately extending time to market.

Ensuring that a design is reliable and ready for tape-out the first time helps prevent costly iterations and keeps projects on track.

In this webinar, Luceda Photonics presents a streamlined approach to bridging the gap between foundry requirements and design intent. We will introduce our “first-time-right” methodology and demonstrate how to identify and resolve common PIC design errors early in the design process. Using the Luceda Photonics Design Platform, compatible with a wide range of foundry design kits worldwide, PIC designers can confidently deliver validated, clean designs that fully comply with foundry requirements and are ready for submission on schedule.

Join us for this webinar to deepen your understanding of DRC in PIC design and see how Luceda enables you to create tape-out-ready PICs with confidence, while shortening development cycles and accelerating time to market.

Toon Snauwaert

Application Engineer
at Luceda Photonics


日程安排

The detailed webinar agenda will be announced soon. 

Register now to secure your spot and be the first to receive the full program and updates!

Date & Time
2026年4月16日星期四
17:00 17:45 (Europe/Brussels)

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