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BEGIN:VEVENT
UID:20261012T160248Z - 77931@eupp208
DTSTART;TZID=Europe/Brussels:20261106T150000
DTEND;TZID=Europe/Brussels:20261106T160000
CREATED:20261012T160248Z
DESCRIPTION:<a href="https://www.lucedaphotonics.com/event/pic-design-in-th
 e-cpo-era-solving-photonic-routing-challenges-in-electro-optical-layout-fl
 ows-197/register">PIC Design in the CPO Era: Solving Photonic Routing Chal
 lenges in Electro-Optical Layout Flows</a>\nSpeaker As Co-Packaged Optics 
 (CPO) and high-density electro-photonic integration advance\, optical desi
 gn teams face a dual challenge: managing complex\, multi-channel photonic 
 routing at scale while maintaining a smooth connection to established elec
 tronic IC flows. Manual geometry adjustments\, phase-matching challenges\,
  and broken design hierarchies during tool handoffs can create significant
  bottlenecks and slow down tapeout schedules. Join us for a webinar where 
 we'll demonstrate how IPKISS addresses these routing challenges through ou
 r Pythonic approach to PIC design. You will learn:About our brand-new Luce
 da E/O Co-Design Integration for Cadence\, which enables a seamless workfl
 ow from photonic synthesis to physical and functional verification by brid
 ging Luceda’s Python-driven photonic design with Cadence’s EPDA ecosys
 tem.How to leverage Luceda's placement and routing capabilities to automat
 ically synthesize complex waveguides\, custom tapers\, and matched delay l
 ines. How to bridge the optics-to-electronics divide by seamlessly exporti
 ng your synthesized IPKISS circuits directly into Cadence Virtuoso\, prese
 rving design hierarchy\, netlists\, and parametric intelligence without wr
 iting custom integration code. Nirav Annavarapu Sales & Application Engine
 er at Luceda Photonics Register now to discover how Luceda enables advance
 d photonic routing and seamless electro-optic integration with Cadence Vir
 tuoso\, eliminating manual transfer errors and reducing time-to-market for
  large-scale co-integrated electronic and photonic ICs. Program 5 mins | W
 elcome & Introduction 30 mins | PIC Design in the CPO Era with Luceda 15 m
 ins | Q&A
DTSTAMP:20261012T160248Z
LOCATION:Online event
SUMMARY:PIC Design in the CPO Era: Solving Photonic Routing Challenges in E
 lectro-Optical Layout Flows
X-ALT-DESC;FMTTYPE=text/html:<a href="https://www.lucedaphotonics.com/event
 /pic-design-in-the-cpo-era-solving-photonic-routing-challenges-in-electro-
 optical-layout-flows-197/register">PIC Design in the CPO Era: Solving Phot
 onic Routing Challenges in Electro-Optical Layout Flows</a>\nSpeaker As Co
 -Packaged Optics (CPO) and high-density electro-photonic integration advan
 ce\, optical design teams face a dual challenge: managing complex\, multi-
 channel photonic routing at scale while maintaining a smooth connection to
  established electronic IC flows. Manual geometry adjustments\, phase-matc
 hing challenges\, and broken design hierarchies during tool handoffs can c
 reate significant bottlenecks and slow down tapeout schedules. Join us for
  a webinar where we'll demonstrate how IPKISS addresses these routing chal
 lenges through our Pythonic approach to PIC design. You will learn:About o
 ur brand-new Luceda E/O Co-Design Integration for Cadence\, which enables 
 a seamless workflow from photonic synthesis to physical and functional ver
 ification by bridging Luceda’s Python-driven photonic design with Cadenc
 e’s EPDA ecosystem.How to leverage Luceda's placement and routing capabi
 lities to automatically synthesize complex waveguides\, custom tapers\, an
 d matched delay lines. How to bridge the optics-to-electronics divide by s
 eamlessly exporting your synthesized IPKISS circuits directly into Cadence
  Virtuoso\, preserving design hierarchy\, netlists\, and parametric intell
 igence without writing custom integration code. Nirav Annavarapu Sales & A
 pplication Engineer at Luceda Photonics Register now to discover how Luced
 a enables advanced photonic routing and seamless electro-optic integration
  with Cadence Virtuoso\, eliminating manual transfer errors and reducing t
 ime-to-market for large-scale co-integrated electronic and photonic ICs. P
 rogram 5 mins | Welcome & Introduction 30 mins | PIC Design in the CPO Era
  with Luceda 15 mins | Q&A
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