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BEGIN:VEVENT
UID:20260524T113739Z - 63299@eupp208
DTSTART;TZID=Europe/Brussels:20250710T170000
DTEND;TZID=Europe/Brussels:20250710T180000
CREATED:20260524T113739Z
DESCRIPTION:<a href="https://www.lucedaphotonics.com/event/from-design-to-t
 apeout-verification-for-fabrication-ready-pics-using-luceda-ipkiss-156/reg
 ister">From Design to Tapeout: Verification for Fabrication-Ready PICs usi
 ng Luceda IPKISS</a>\nSpeakers Moderator Sean Nelan Photonics Engineering 
 Lead at Spark Photonics Oleg Martynov Director\, Silicon Photonics Technol
 ogy Development at Tower Semiconductor Mathias Weisen Application Engineer
  – Support Responsible at Luceda Photonics Matthew Delaney Business Deve
 lopment Manager – North America at Luceda Photonics Missed the webinar? 
 Watch Now Verification is a vital step in the development of photonic inte
 grated circuits (PICs)\, helping ensure your designs are both manufacturab
 le and behave as intended. Design Rule Checking (DRC)\, Layout Versus Sche
 matic (LVS)\, circuit simulation and corner analysis are all key aspects o
 f verification. DRC and LVS have their roots in electronic design automati
 on (EDA) but require tailored adaptation for the complex world of photonic
 s. Join us for a joint webinar where Tower Semiconductor\, Spark Photonics
 \, and Luceda Photonics will discuss the importance of verification in PIC
  design\, and how PIC designers can efficiently verify their designs prior
  to taping out at a foundry. In this webinar:Tower will introduce their in
 dustry-leading PIC platform and discuss why DRC is essential for successfu
 l fabrication.Spark will provide an overview of the PIC design workflow\, 
 including DRC and LVS\, and introduce Check Mate DRC\, a powerful tool for
  detecting design rule violations.Luceda will demonstrate:A full PIC desig
 n and layout flow on the Tower PH18M process using the Luceda Photonics De
 sign Platform.Verification of the design in Luceda IPKISS.Identifying and 
 fixing errors to prepare for successful tape-out at Tower. Whether you're 
 new to PIC design or looking to refine your verification process\, this we
 binar offers practical insights and tools to enhance your PIC design flow 
 and help you create manufacturable PICs\, avoiding unnecessary costs and d
 elays to market. Register now to learn more about Tower’s PIC platform\,
  how to [...]
DTSTAMP:20260524T113739Z
LOCATION:Online event
SUMMARY:From Design to Tapeout: Verification for Fabrication-Ready PICs usi
 ng Luceda IPKISS
X-ALT-DESC;FMTTYPE=text/html:<a href="https://www.lucedaphotonics.com/event
 /from-design-to-tapeout-verification-for-fabrication-ready-pics-using-luce
 da-ipkiss-156/register">From Design to Tapeout: Verification for Fabricati
 on-Ready PICs using Luceda IPKISS</a>\nSpeakers Moderator Sean Nelan Photo
 nics Engineering Lead at Spark Photonics Oleg Martynov Director\, Silicon 
 Photonics Technology Development at Tower Semiconductor Mathias Weisen App
 lication Engineer – Support Responsible at Luceda Photonics Matthew Dela
 ney Business Development Manager – North America at Luceda Photonics Mis
 sed the webinar? Watch Now Verification is a vital step in the development
  of photonic integrated circuits (PICs)\, helping ensure your designs are 
 both manufacturable and behave as intended. Design Rule Checking (DRC)\, L
 ayout Versus Schematic (LVS)\, circuit simulation and corner analysis are 
 all key aspects of verification. DRC and LVS have their roots in electroni
 c design automation (EDA) but require tailored adaptation for the complex 
 world of photonics. Join us for a joint webinar where Tower Semiconductor\
 , Spark Photonics\, and Luceda Photonics will discuss the importance of ve
 rification in PIC design\, and how PIC designers can efficiently verify th
 eir designs prior to taping out at a foundry. In this webinar:Tower will i
 ntroduce their industry-leading PIC platform and discuss why DRC is essent
 ial for successful fabrication.Spark will provide an overview of the PIC d
 esign workflow\, including DRC and LVS\, and introduce Check Mate DRC\, a 
 powerful tool for detecting design rule violations.Luceda will demonstrate
 :A full PIC design and layout flow on the Tower PH18M process using the Lu
 ceda Photonics Design Platform.Verification of the design in Luceda IPKISS
 .Identifying and fixing errors to prepare for successful tape-out at Tower
 . Whether you're new to PIC design or looking to refine your verification 
 process\, this webinar offers practical insights and tools to enhance your
  PIC design flow and help you create manufacturable PICs\, avoiding unnece
 ssary costs and delays to market. Register now to learn more about Tower
 ’s PIC platform\, how to [...]
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