CORNERSTONE is a new fabrication capability that can provide competitive prices for both active and passive silicon photonic devices. It has a track record of world-leading results and is supported by some of the world’s best academic fabrication facilities.
The PDK allows the layout of custom components and circuits in the 220nm, 340nm and 500nm SOI platforms provided by CORNERSTONE. A die template, parametric cells and examples are provided to shorten the design cycle. Using virtual fabrication, the validity of the layout can be checked in cross-section and devices can be sent to simulators including CST Studio Suite.
The PDK can be used from L-Edit using IPKISS.eda as well as from IPKISS.flow.
Luceda has a dedicated team focused entirely on releasing and supporting PDKs. This latest PDK adds to the train of PDKs that will be released in the coming months.
Learn all about the CORNERSTONE PDK
The mask submission deadline for the 6th CORNERSTONE Multi Project Wafer Run is Friday 6th April 2018.
Learn all about CORNERSTONE