Network-on-Chip(NoC) has become default communication paradigm in System-on-Chip (SoC). The research challenges involve low power, high performance, security and scalability aspects of NoC design beyond current state of art in the industries. The demand for bandwidth increases exponentially with the rise in number of cores of CMPs.
Traditional metallic interconnects can’t offer such an enormous bandwidth considering the power limits. On the contrary, photonic interconnects provides extremely high data rate with least power consumption.
Photonic Network-on-Chip(PNoC) is the next generation on-chip communication paradigm for CMPs, which uses photonic interconnects as its building blocks.
Luceda Photonics has enriched our research on Photonic Network-on-Chip (PNoC)
We use the IPKISS tool to virtually fabricate photonic components like ring resonator, modulator, demodulator, waveguides, lasers etc. These basic components are integrated to implement our PNoC design. Finally, we use CAPHE to pursue time-domain and frequency-domain analysis. We moulded it to calculate power and latency of our design. Apart from all this, Dr.Martin Fiers is simply awesome to be a mentor. He has supported us continuously since last one year.
Following are a few outcomes of our research on photonics.
Author Contact Information:
PhD Candidate, Computer Engineering
Codesign of Embedded Systems Research lab
Texas A&M University, USA
o D Dang, B Patra, R Mahapatra; “2-Layer Laser Multiplexed Photonic Network-on-Chip” In the Proc. of IEEE Intl. Symposium on Quality Electronic Design (ISQED)-2015, Santa Clara, USA
o D Dang, B Patra, M Fiers, R Mahapatra; “Mode-Division-Multiplexed Photonic Router for High Performance Network-on-Chip”- In the Proc. of IEEE VLSI Design 2015, Bangalore, India
o D Dang, B Patra, R Mahapatra; “A Multi-layer Design Approach for Hybrid 3D Photonic Network-on-Chip”, Accepted to be published at ACM/SIGDA GLSVLSI’2015, Pittsburgh, USA